Ryujinx/Ryujinx.HLE/HOS/Services/Nv/INvDrvServices.cs

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Add a new JIT compiler for CPU code (#693) * Start of the ARMeilleure project * Refactoring around the old IRAdapter, now renamed to PreAllocator * Optimize the LowestBitSet method * Add CLZ support and fix CLS implementation * Add missing Equals and GetHashCode overrides on some structs, misc small tweaks * Implement the ByteSwap IR instruction, and some refactoring on the assembler * Implement the DivideUI IR instruction and fix 64-bits IDIV * Correct constant operand type on CSINC * Move division instructions implementation to InstEmitDiv * Fix destination type for the ConditionalSelect IR instruction * Implement UMULH and SMULH, with new IR instructions * Fix some issues with shift instructions * Fix constant types for BFM instructions * Fix up new tests using the new V128 struct * Update tests * Move DIV tests to a separate file * Add support for calls, and some instructions that depends on them * Start adding support for SIMD & FP types, along with some of the related ARM instructions * Fix some typos and the divide instruction with FP operands * Fix wrong method call on Clz_V * Implement ARM FP & SIMD move instructions, Saddlv_V, and misc. fixes * Implement SIMD logical instructions and more misc. fixes * Fix PSRAD x86 instruction encoding, TRN, UABD and UABDL implementations * Implement float conversion instruction, merge in LDj3SNuD fixes, and some other misc. fixes * Implement SIMD shift instruction and fix Dup_V * Add SCVTF and UCVTF (vector, fixed-point) variants to the opcode table * Fix check with tolerance on tester * Implement FP & SIMD comparison instructions, and some fixes * Update FCVT (Scalar) encoding on the table to support the Half-float variants * Support passing V128 structs, some cleanup on the register allocator, merge LDj3SNuD fixes * Use old memory access methods, made a start on SIMD memory insts support, some fixes * Fix float constant passed to functions, save and restore non-volatile XMM registers, other fixes * Fix arguments count with struct return values, other fixes * More instructions * Misc. fixes and integrate LDj3SNuD fixes * Update tests * Add a faster linear scan allocator, unwinding support on windows, and other changes * Update Ryujinx.HLE * Update Ryujinx.Graphics * Fix V128 return pointer passing, RCX is clobbered * Update Ryujinx.Tests * Update ITimeZoneService * Stop using GetFunctionPointer as that can't be called from native code, misc. fixes and tweaks * Use generic GetFunctionPointerForDelegate method and other tweaks * Some refactoring on the code generator, assert on invalid operations and use a separate enum for intrinsics * Remove some unused code on the assembler * Fix REX.W prefix regression on float conversion instructions, add some sort of profiler * Add hardware capability detection * Fix regression on Sha1h and revert Fcm** changes * Add SSE2-only paths on vector extract and insert, some refactoring on the pre-allocator * Fix silly mistake introduced on last commit on CpuId * Generate inline stack probes when the stack allocation is too large * Initial support for the System-V ABI * Support multiple destination operands * Fix SSE2 VectorInsert8 path, and other fixes * Change placement of XMM callee save and restore code to match other compilers * Rename Dest to Destination and Inst to Instruction * Fix a regression related to calls and the V128 type * Add an extra space on comments to match code style * Some refactoring * Fix vector insert FP32 SSE2 path * Port over the ARM32 instructions * Avoid memory protection races on JIT Cache * Another fix on VectorInsert FP32 (thanks to LDj3SNuD * Float operands don't need to use the same register when VEX is supported * Add a new register allocator, higher quality code for hot code (tier up), and other tweaks * Some nits, small improvements on the pre allocator * CpuThreadState is gone * Allow changing CPU emulators with a config entry * Add runtime identifiers on the ARMeilleure project * Allow switching between CPUs through a config entry (pt. 2) * Change win10-x64 to win-x64 on projects * Update the Ryujinx project to use ARMeilleure * Ensure that the selected register is valid on the hybrid allocator * Allow exiting on returns to 0 (should fix test regression) * Remove register assignments for most used variables on the hybrid allocator * Do not use fixed registers as spill temp * Add missing namespace and remove unneeded using * Address PR feedback * Fix types, etc * Enable AssumeStrictAbiCompliance by default * Ensure that Spill and Fill don't load or store any more than necessary
2019-08-08 20:56:22 +02:00
using ARMeilleure.Memory;
using Ryujinx.Common.Logging;
using Ryujinx.HLE.HOS.Ipc;
using Ryujinx.HLE.HOS.Kernel.Common;
using Ryujinx.HLE.HOS.Kernel.Process;
using Ryujinx.HLE.HOS.Kernel.Threading;
using Ryujinx.HLE.HOS.Services.Nv.NvGpuAS;
using Ryujinx.HLE.HOS.Services.Nv.NvGpuGpu;
using Ryujinx.HLE.HOS.Services.Nv.NvHostChannel;
using Ryujinx.HLE.HOS.Services.Nv.NvHostCtrl;
using Ryujinx.HLE.HOS.Services.Nv.NvMap;
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using System;
using System.Collections.Generic;
namespace Ryujinx.HLE.HOS.Services.Nv
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{
[Service("nvdrv")]
[Service("nvdrv:a")]
class INvDrvServices : IpcService
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{
private delegate int IoctlProcessor(ServiceCtx context, int cmd);
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private static Dictionary<string, IoctlProcessor> _ioctlProcessors =
new Dictionary<string, IoctlProcessor>()
{
{ "/dev/nvhost-as-gpu", ProcessIoctlNvGpuAS },
{ "/dev/nvhost-ctrl", ProcessIoctlNvHostCtrl },
{ "/dev/nvhost-ctrl-gpu", ProcessIoctlNvGpuGpu },
{ "/dev/nvhost-gpu", ProcessIoctlNvHostChannel },
{ "/dev/nvhost-nvdec", ProcessIoctlNvHostChannel },
{ "/dev/nvhost-vic", ProcessIoctlNvHostChannel },
{ "/dev/nvmap", ProcessIoctlNvMap }
};
public static GlobalStateTable Fds { get; private set; }
private KEvent _event;
public INvDrvServices(ServiceCtx context)
{
_event = new KEvent(context.Device.System);
}
static INvDrvServices()
{
Fds = new GlobalStateTable();
}
[Command(0)]
// Open(buffer<bytes, 5> path) -> (u32 fd, u32 error_code)
public ResultCode Open(ServiceCtx context)
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{
long namePtr = context.Request.SendBuff[0].Position;
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string name = MemoryHelper.ReadAsciiString(context.Memory, namePtr);
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int fd = Fds.Add(context.Process, new NvFd(name));
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context.ResponseData.Write(fd);
context.ResponseData.Write(0);
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return ResultCode.Success;
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}
[Command(1)]
// Ioctl(u32 fd, u32 rq_id, buffer<bytes, 0x21>) -> (u32 error_code, buffer<bytes, 0x22>)
[Command(11)] // 3.0.0+
// Ioctl2(u32, u32, buffer<bytes, 0x21>, buffer<bytes, 0x21>) -> (u32, buffer<bytes, 0x22>)
public ResultCode Ioctl(ServiceCtx context)
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{
int fd = context.RequestData.ReadInt32();
int cmd = context.RequestData.ReadInt32();
NvFd fdData = Fds.GetData<NvFd>(context.Process, fd);
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int result = 0;
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if (_ioctlProcessors.TryGetValue(fdData.Name, out IoctlProcessor process))
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{
result = process(context, cmd);
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}
else if (!ServiceConfiguration.IgnoreMissingServices)
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{
throw new NotImplementedException($"{fdData.Name} {cmd:x4}");
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}
// TODO: Verify if the error codes needs to be translated.
context.ResponseData.Write(result);
return ResultCode.Success;
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}
[Command(2)]
// Close(u32 fd) -> u32 error_code
public ResultCode Close(ServiceCtx context)
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{
int fd = context.RequestData.ReadInt32();
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Fds.Delete(context.Process, fd);
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context.ResponseData.Write(0);
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return ResultCode.Success;
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}
[Command(3)]
// Initialize(u32 transfer_memory_size, handle<copy, process> current_process, handle<copy, transfer_memory> transfer_memory) -> u32 error_code
public ResultCode Initialize(ServiceCtx context)
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{
long transferMemSize = context.RequestData.ReadInt64();
int transferMemHandle = context.Request.HandleDesc.ToCopy[0];
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NvMapIoctl.InitializeNvMap(context);
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context.ResponseData.Write(0);
return ResultCode.Success;
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}
[Command(4)]
// QueryEvent(u32 fd, u32 event_id) -> (u32, handle<copy, event>)
public ResultCode QueryEvent(ServiceCtx context)
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{
int fd = context.RequestData.ReadInt32();
int eventId = context.RequestData.ReadInt32();
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// TODO: Use Fd/EventId, different channels have different events.
if (context.Process.HandleTable.GenerateHandle(_event.ReadableEvent, out int handle) != KernelResult.Success)
{
throw new InvalidOperationException("Out of handles!");
}
context.Response.HandleDesc = IpcHandleDesc.MakeCopy(handle);
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context.ResponseData.Write(0);
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return ResultCode.Success;
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}
[Command(8)]
// SetClientPID(u64, pid) -> u32 error_code
public ResultCode SetClientPid(ServiceCtx context)
{
long pid = context.RequestData.ReadInt64();
context.ResponseData.Write(0);
return ResultCode.Success;
}
[Command(9)]
// DumpGraphicsMemoryInfo()
public ResultCode DumpGraphicsMemoryInfo(ServiceCtx context)
{
Logger.PrintStub(LogClass.ServiceNv);
return ResultCode.Success;
}
[Command(13)]
// FinishInitialize(unknown<8>)
public ResultCode FinishInitialize(ServiceCtx context)
{
Logger.PrintStub(LogClass.ServiceNv);
return ResultCode.Success;
}
private static int ProcessIoctlNvGpuAS(ServiceCtx context, int cmd)
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{
return ProcessIoctl(context, cmd, NvGpuASIoctl.ProcessIoctl);
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}
private static int ProcessIoctlNvHostCtrl(ServiceCtx context, int cmd)
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{
return ProcessIoctl(context, cmd, NvHostCtrlIoctl.ProcessIoctl);
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}
private static int ProcessIoctlNvGpuGpu(ServiceCtx context, int cmd)
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{
return ProcessIoctl(context, cmd, NvGpuGpuIoctl.ProcessIoctl);
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}
private static int ProcessIoctlNvHostChannel(ServiceCtx context, int cmd)
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{
return ProcessIoctl(context, cmd, NvHostChannelIoctl.ProcessIoctl);
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}
private static int ProcessIoctlNvMap(ServiceCtx context, int cmd)
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{
return ProcessIoctl(context, cmd, NvMapIoctl.ProcessIoctl);
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}
private static int ProcessIoctl(ServiceCtx context, int cmd, IoctlProcessor processor)
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{
if (CmdIn(cmd) && context.Request.GetBufferType0x21().Position == 0)
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{
Logger.PrintError(LogClass.ServiceNv, "Input buffer is null!");
return NvResult.InvalidInput;
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}
if (CmdOut(cmd) && context.Request.GetBufferType0x22().Position == 0)
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{
Logger.PrintError(LogClass.ServiceNv, "Output buffer is null!");
return NvResult.InvalidInput;
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}
return processor(context, cmd);
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}
private static bool CmdIn(int cmd)
{
return ((cmd >> 30) & 1) != 0;
}
private static bool CmdOut(int cmd)
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{
return ((cmd >> 31) & 1) != 0;
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}
public static void UnloadProcess(KProcess process)
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{
Fds.DeleteProcess(process);
NvGpuASIoctl.UnloadProcess(process);
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NvHostChannelIoctl.UnloadProcess(process);
NvHostCtrlIoctl.UnloadProcess(process);
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NvMapIoctl.UnloadProcess(process);
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}
}
}