Ignore exit flag on branch delay slot (#899)
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d6b9babe1d
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5 changed files with 42 additions and 1 deletions
12
Ryujinx.Graphics.Gpu/Engine/MethodFirmware.cs
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12
Ryujinx.Graphics.Gpu/Engine/MethodFirmware.cs
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@ -0,0 +1,12 @@
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using Ryujinx.Graphics.Gpu.State;
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namespace Ryujinx.Graphics.Gpu.Engine
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{
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partial class Methods
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{
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private void FirmwareCall4(GpuState state, int argument)
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{
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state.Write(0xd00, 1);
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}
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}
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}
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@ -83,6 +83,8 @@ namespace Ryujinx.Graphics.Gpu.Engine
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state.RegisterCallback(MethodOffset.Report, Report);
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state.RegisterCallback(MethodOffset.Report, Report);
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state.RegisterCallback(MethodOffset.FirmwareCall4, FirmwareCall4);
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state.RegisterCallback(MethodOffset.UniformBufferUpdateData, 16, UniformBufferUpdate);
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state.RegisterCallback(MethodOffset.UniformBufferUpdateData, 16, UniformBufferUpdate);
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state.RegisterCallback(MethodOffset.UniformBufferBindVertex, UniformBufferBindVertex);
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state.RegisterCallback(MethodOffset.UniformBufferBindVertex, UniformBufferBindVertex);
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@ -58,6 +58,8 @@ namespace Ryujinx.Graphics.Gpu
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private int _pipeOp;
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private int _pipeOp;
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private bool _ignoreExitFlag;
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private int _pc;
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private int _pc;
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/// <summary>
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/// <summary>
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@ -232,12 +234,19 @@ namespace Ryujinx.Graphics.Gpu
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{
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{
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FetchOpCode(mme);
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FetchOpCode(mme);
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}
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}
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else
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{
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// The delay slot instruction exit flag should be ignored.
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_ignoreExitFlag = true;
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}
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return true;
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return true;
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}
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}
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}
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}
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bool exit = (_opCode & 0x80) != 0;
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bool exit = (_opCode & 0x80) != 0 && !_ignoreExitFlag;
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_ignoreExitFlag = false;
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return !exit;
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return !exit;
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}
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}
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@ -93,6 +93,16 @@ namespace Ryujinx.Graphics.Gpu.State
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return _backingMemory[offset];
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return _backingMemory[offset];
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}
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}
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/// <summary>
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/// Writes data to the GPU register at the given offset.
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/// </summary>
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/// <param name="offset">Offset to be written</param>
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/// <param name="value">Value to be written</param>
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public void Write(int offset, int value)
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{
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_backingMemory[offset] = value;
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}
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/// <summary>
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/// <summary>
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/// Writes an offset value at the uniform buffer offset register.
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/// Writes an offset value at the uniform buffer offset register.
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/// </summary>
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/// </summary>
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@ -80,6 +80,14 @@ namespace Ryujinx.Graphics.Gpu.State
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BlendState = 0x780,
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BlendState = 0x780,
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VertexBufferEndAddress = 0x7c0,
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VertexBufferEndAddress = 0x7c0,
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ShaderState = 0x800,
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ShaderState = 0x800,
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FirmwareCall0 = 0x8c0,
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FirmwareCall1 = 0x8c1,
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FirmwareCall2 = 0x8c2,
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FirmwareCall3 = 0x8c3,
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FirmwareCall4 = 0x8c4,
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FirmwareCall5 = 0x8c5,
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FirmwareCall6 = 0x8c6,
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FirmwareCall7 = 0x8c7,
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UniformBufferState = 0x8e0,
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UniformBufferState = 0x8e0,
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UniformBufferUpdateData = 0x8e4,
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UniformBufferUpdateData = 0x8e4,
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UniformBufferBindVertex = 0x904,
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UniformBufferBindVertex = 0x904,
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