diff --git a/ChocolArm64/Instruction/AInstEmitAlu.cs b/ChocolArm64/Instruction/AInstEmitAlu.cs
index 0e546f7ab..490387e12 100644
--- a/ChocolArm64/Instruction/AInstEmitAlu.cs
+++ b/ChocolArm64/Instruction/AInstEmitAlu.cs
@@ -50,8 +50,6 @@ namespace ChocolArm64.Instruction
 
         public static void Adds(AILEmitterCtx Context)
         {
-            Context.TryOptMarkCondWithoutCmp();
-
             EmitDataLoadOpers(Context);
 
             Context.Emit(OpCodes.Add);
diff --git a/ChocolArm64/Translation/AILEmitterCtx.cs b/ChocolArm64/Translation/AILEmitterCtx.cs
index a004a9665..3fa46e96d 100644
--- a/ChocolArm64/Translation/AILEmitterCtx.cs
+++ b/ChocolArm64/Translation/AILEmitterCtx.cs
@@ -187,11 +187,6 @@ namespace ChocolArm64.Translation
                 Ldloc(Tmp3Index, AIoType.Int, OptOpLastCompare.RegisterSize);
                 Ldloc(Tmp4Index, AIoType.Int, OptOpLastCompare.RegisterSize);
 
-                if (OptOpLastCompare.Emitter == AInstEmit.Adds)
-                {
-                    Emit(OpCodes.Neg);
-                }
-
                 ILOp = BranchOps[Cond];
             }
             else if (IntCond < 14)